I like the schematic. Also, I like the idea of using a 3bit synchronous counter to display an automatic message. The VHDL code was really good. Overall, good presentation
I like how you show the steps of why using 4-bits synchronous counter instead of 3-bits. However, I would like to see the 4-bits working during the presentation. Cool presentation.
Good project nice presentation, i wish i could have seen the project actually work. Next time make sure technical issues is solve before any kind of presentation. Good job overall.
That sound interesting and common ” 3 2 1 GO ” . Very useful message in triggering situations.Good job.
However my concern is the fact that your block schematic shows the clock and the counter as one block. shouldn’t they be separated?
The clock is one block with a separate VHDL code and so is the counter.The clock output drive the counter input.
good presentation and good explanation for their 3 bit only thing that gave a bit of problem was the software issue you guys got on the presentation but not your fault it is software problem
I like the schematic. Also, I like the idea of using a 3bit synchronous counter to display an automatic message. The VHDL code was really good. Overall, good presentation
I like how you show the steps of why using 4-bits synchronous counter instead of 3-bits. However, I would like to see the 4-bits working during the presentation. Cool presentation.
Good project nice presentation, i wish i could have seen the project actually work. Next time make sure technical issues is solve before any kind of presentation. Good job overall.
It needs a little bit of work on the 7 segment display so in this way the display is fixed correctly.
very nice, you show the implementation! from 3bit to 4bit
Have some technical issues when presenting, but overall a good presentation.
it a great project, look just like my project.
overall a great presentation
good information, needed to show display
Great presentation overall
That sound interesting and common ” 3 2 1 GO ” . Very useful message in triggering situations.Good job.
However my concern is the fact that your block schematic shows the clock and the counter as one block. shouldn’t they be separated?
The clock is one block with a separate VHDL code and so is the counter.The clock output drive the counter input.
Wish I could have seen your project in action, but glad that your presentation was good enough to understand what was supposed to happen.
Have a easier way on scrolling, good explanation too.
Great explanation of the procedure. but no display
The presentation was great, but that doesn’t make up for the technical issues. This would be very problematic in a professional environment.
Nicely designed powerpoint. I like that more pictures and diagrams were used in the slides than words.
good presentation and good explanation for their 3 bit only thing that gave a bit of problem was the software issue you guys got on the presentation but not your fault it is software problem
Great presentation, but need to make it works.
Great presentation keep it up guys! Very similar to Vincent projects