Project#07

Automatic Message by Group#07 (Chun Li and Josiah Morales)

Group_07

19 thoughts on “Project#07

  1. Adam Forbes

    I like the schematic. Also, I like the idea of using a 3bit synchronous counter to display an automatic message. The VHDL code was really good. Overall, good presentation

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  2. Lee

    I like how you show the steps of why using 4-bits synchronous counter instead of 3-bits. However, I would like to see the 4-bits working during the presentation. Cool presentation.

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  3. IsmaelN.

    That sound interesting and common ” 3 2 1 GO ” . Very useful message in triggering situations.Good job.
    However my concern is the fact that your block schematic shows the clock and the counter as one block. shouldn’t they be separated?
    The clock is one block with a separate VHDL code and so is the counter.The clock output drive the counter input.

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  4. darklor7

    good presentation and good explanation for their 3 bit only thing that gave a bit of problem was the software issue you guys got on the presentation but not your fault it is software problem

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