CET 4805 Component and Subsystem Design II
Hours: 3 lecture/laboratory/other
The course provides an exciting and challenging laboratory component for implementation and testing of complex engineering projects. Each digital component and system design will come with integrated laboratory experimental activities. The prototyping of complex digital logic and software systems are used as a means to demonstrate engineering practice and design. The course will introduce the students to basic design methodology, VHDL and CAD tools used in the design, synthesis and analysis of digital computer and communication systems, and Field-programmable gate array device (FPGAs). Upon successful completion of this course, the student will be able to use of the IEEE standard hardware description language (VHDL) and schematic design as practical means to implement hybrid sequential and combinational designs. Students will gain practical experience in the protocol, design, simulation, and testing of digital systems. The Altera DE2 education board will provide the desired platform.
Instructor: Dr. Y.Wang